The present invention relates to a method and apparatus that introduces matched errors in an electronic circuit to improve current matching performance. More specifically, the present invention is directed to a technique that improves electronic circuit performance by identifying critical points in the electronic circuit and coupling additional circuitry to the critical points in the electronic circuit to provide matched errors at the critical points.
The present invention is directed to providing a method and apparatus that improves performance in circuits that have current mirrors. More specifically the present invention is directed to providing a method and apparatus that introduces a matched error into a circuit that includes a current mirror, such that mismatches in currents in the current mirror are minimized. The current mirror with matched errors operates with low power supply voltages while maintaining reduced mismatches in the currents. The current mirror may further operate over a wide power supply range while reducing mismatch errors in the currents. A simulated diode introduces the matched errors into the current mirror such that matching performance is improved. The simulated diode counteracts the sources of matching errors such as mismatches in Beta, early voltage effects, transconductance, and channel-length modulation effects.
Briefly stated, the present invention is directed to a xe2x80x9cSauer diodexe2x80x9d circuit that is arranged to introduce a signal into a circuit to compensate for mismatch effects to various parameters in a current mirror circuit. Current matching between transistors is improved by providing matched errors such as forward current gain (Beta), early voltage, transconductance, channel-length modulation, as well as other sources of matching errors. The Sauer diode includes a series of transistors that are arranged to operate as a diode circuit that has errors that are matched to other components in an application circuit. Example application circuits include, but are not limited to reference circuits, operational amplifiers, comparators, analog-to-digital converters, digital-to-analog converters as well as other circuits that employ current mirror circuitry. The Sauer diode may be implemented in a single transistor technology such as MOS, BJT, FET, or a number of mixed technologies such as BiCMOS, BiFET and the like.
In accordance with one embodiment of the present invention an apparatus is directed to an improved matching current mirror. The improved matching current mirror includes a first transistor, a second transistor, a third transistor and a Sauer diode circuit. The first transistor is of a first type, has a first operating condition, and is arranged to provide a first current. The second transistor is of the first type, has a second operating condition, and is arrnged to provide a second current that is related to the first current, wherein the first and second currents are related to one another by a non-ideal ratio that includes an error. The third transistor is of a second type, has a third operation condition, and is arranged to provide a third current in response to a signal and the second current, wherein the first and third currents are related to one another by an other non-ideal ratio. The Sauer diode circuit is arranged to produce the signal. The signal includes a proportional error that is related to the error such that the proportional error is coupled to the first transistor. The performance of the third transistor is improved by counteracting the mismatching effects of the error with the proportional error.
In accordance with another embodiment of the present invention, an apparatus is directed to improve matching in a current mirror circuit. The current mirror circuit includes a diode circuit and a transistor circuit that are arranged to operate as a current mirror. The apparatus includes a first diode means that is arranged to operate as a diode that has a similar operating condition as the diode circuit, wherein the first diode provides a first current. A first current mirror means is arranged to operate as a current mirror that has a similar operating condition as the transistor circuit, wherein the first current mirror means provides a second current that is related to the first current. A second current mirror means is arranged to produce a third current in response to the second current, wherein the third current is arranged to provide an error canceling effect on mismatches in the current mirror circuit.
In accordance with yet another embodiment of the present invention a method is directed to an improved matching current mirror circuit. The current mirror circuit includes a diode circuit and a transistor circuit that are arranged to operate as a current mirror. The method includes arranging another diode circuit to operate with an operating environment that is substantially similar to the diode circuit, arranging another transistor circuit to operate with an operating environment that is substantially similar to the transistor circuit, and reflecting a current from the another transistor circuit into the transistor circuit such that the currents in the transistor circuit match closely to the currents in the diode circuit.
In accordance with still another embodiment of the present invention an apparatus is directed to improve matching in a current mirror circuit. The apparatus includes a first transistor of a first type that is arranged to operate as a diode, the first transistor providing a first current. A second transistor of the first type is arranged to provide a second current that is related to the first current. A third transistor of a second type is arranged to conduct the first current, the third transistor being responsive to a signal at a common node. A fourth transistor of the second type is arranged to operate as a diode that conducts the current from the second transistor. A fifth transistor of the second type is arranged to provide a third current to the common node in response to the second current such that the common node operates as a terminal corresponding to a simulated diode, whereby the simulated diode is utilized to provide matched errors to the current mirror circuit such that the performance of the current mirror circuit is improved.
A more complete appreciation of the present invention and its improvements can be obtained by reference to the accompanying drawings, which are briefly summarized below, to the following detail description of presently preferred embodiments of the invention, and to the appended claims.